IFIP WG 10.5.
International Federation for Information Processing Working Group 10.5
International Federation for Information Processing Working Group Very Large Scale Integration
International Federation for Information Processing Working Group Design and Engineering of Electronic Systems
VIAF ID: 123285022 ( Corporate )
Permalink: http://viaf.org/viaf/123285022
Preferred Forms
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- 110 2 _ ‡a IFIP WG 10.5
- 110 2 _ ‡a IFIP WG 10.5
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- 110 2 _ ‡a International Federation for Information Processing ‡b Working Group Design and Engineering of Electronic Systems
- 110 2 _ ‡a International Federation for Information Processing ‡b Working Group Very Large Scale Integration
4xx's: Alternate Name Forms (21)
5xx's: Related Names (3)
- 510 2 _ ‡a International Federation for Information Processing ‡b Technical Committee Computer Systems Technology ‡4 adue ‡4 https://d-nb.info/standards/elementset/gnd#hierarchicalSuperiorOfTheCorporateBody ‡e Ueberordnung
- 510 2 _ ‡a International Federation for Information Processing ‡b Technical Committee Digital Systems Design
- 510 2 _ ‡a International Federation for Information Processing ‡b Working Group Very Large Scale Integration ‡4 vorg ‡4 https://d-nb.info/standards/elementset/gnd#precedingCorporateBody ‡e Vorgaenger
Works
Title | Sources |
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12th Symposium on Integrated Circuits and Systems Design | |
Asynchronous design methodologies : proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies, Manchester, UK, 31 March-2 April, 1993 | |
CODES+ISSS '05 | |
Correct hardware design and verification methods : IFIP WG 10.5 advanced research working conference, CHARME '95, Frankfurt/Main, Germany, October 2-4, 1995 : proceedings | |
Distributed and parallel embedded systems : IFIP WG10.3/WG10.5 International Workshop on Distributed and Parallel Embedded Systems (DIPES'98), October 5-6, 1998, Schloß Eringerfeld, Germany | |
Electronic design automation frameworks : when will the promise be realized? : proceedings of the Third IFIP WG10.2/WG10.5 Workshop on Electronic Design Automation Frameworks in cooperation with GI/ITG FG 3.5.6/5.2.6, Bad Lippspringe, Germany, 23-25 March, 1992 | |
Formal methods for VLSI design : IFIP WG 10.5 lecture notes | |
IFIP CHARME 2005 | |
IFIP WG 10.5 Workshop on Wafer Scale Integration (1986 : Grenoble, France). Wafer scale integration, 1986: | |
ISSS'97 | |
Logic and architecture synthesis : proceedings of the IFIP TC10/WG10.5 Workshop on Logic and Architecture Synthesis, Paris, France, 30 May-1 June 1990 | |
Proc. Int. Symp. Syst. Synth. | |
Proceedings (Int. Workshop Rapid Syst. Prototyp.) | |
Proceedings : SBCCI ... | |
RSP | |
Russian workshop '92 | |
SBCCI99 | |
Shortening the path from specification to prototype | |
Synthesis for control dominated circuits : selected papers from the IFIP WG10.2/WG10.5 workshops, Grenoble, France, April and September, 1992 | |
Tenth International Symposium on System Synthesis | |
VLSI: integrated systems on silicon : IFIP TC10 WG10.5 International Conference on Very Large Scale Integration, 26-30 August 1997, Gramado, RS, Brazil |