VIAF

Virtual International Authority File

Search

Furber, Stephen Bo, 1953- National Diet Library, Japan National Library of the Netherlands National Library of Australia

Steve Furber Wikidata

Furber, Stephen B. (Stephen Bo), 1953- Library of Congress/NACO National Library of Israel

Furber, Stephen B. 1953- German National Library NUKAT Center of Warsaw University Library

Furber, Steven B. 1953- ISNI

Furber, Steven B. (Stephen Bo), 1953- Sudoc [ABES], France

Furber, Stephen B. National Library of France

Furber, Stephen B 1953 Stephen Bo BIBSYS

Furber, Steve National Library of Korea

Furber, Stephen B. (Stephen Bo) NII (Japan)

VIAF ID: 76899 (Personal)

Permalink: http://viaf.org/viaf/76899

Open Section Close Section Preferred Forms

 

 

 

 

Open Section Close Section 4xx's: Alternate Name Forms (24)

Open Section Close SectionWorks

Title Sources
Accuracy and Efficiency in Fixed-Point Neural ODE Solvers. Wikidata
ARM purosessa : 32bitto RISC no shisutemu ākitekucha National Diet Library, Japan
ARM system architecture xR Extended Relationships
ARM system-on-chip architecture National Diet Library, Japan BIBSYS National Library of the Netherlands Wikidata German National Library NUKAT Center of Warsaw University Library National Library of Korea Library of Congress/NACO Sudoc [ABES], France xR Extended Relationships
ARMプロセッサ : 32ビットRISCのシステム・アーキテクチャ National Diet Library, Japan NII (Japan)
Asynchronous design methodologies : proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies, Manchester, UK, 31 March-2 April 1993 National Library of the Netherlands National Library of Israel Library of Congress/NACO NUKAT Center of Warsaw University Library German National Library
An asynchronous low latency arbiter for Quality of Service (QoS) applications Wikidata
Beyond Moore's law. Wikidata
Biologically-Inspired Massively-Parallel Architectures - Computing Beyond a Million Processors Wikidata
Biologically inspired means for rank-order encoding images: a quantitative analysis. Wikidata
Breaking the millisecond barrier on SpiNNaker: implementing asynchronous event-based plastic models with microsecond resolution Wikidata
Chain: a delay-insensitive chip area interconnect Wikidata
Concurrent heterogeneous neural model simulation on real-time neuromimetic hardware. Wikidata
ConvNets experiments on SpiNNaker Wikidata
Creating, documenting and sharing network models. Wikidata
Design and analysis of a self-timed duplex communication system Wikidata
Designing robust asynchronous circuit components Wikidata
Engineering a thalamo-cortico-thalamic circuit on SpiNNaker: a preliminary study toward modeling sleep and wakefulness Wikidata
A forecast-based STDP rule suitable for neuromorphic implementation. Wikidata
A framework for plasticity implementation on the SpiNNaker neural architecture. Wikidata
The Future of Computer Technology and its Implications for the Computer Industry Wikidata
Future trends in SoC interconnect Wikidata
Hikaku kenkyū risuku ākitekucha National Diet Library, Japan
Live Demo: Spiking ratSLAM: Rat hippocampus cells in spiking neural hardware Wikidata
Live demonstration: Ethernet communication linking two large-scale neuromorphic systems Wikidata
Living with Failure: Lessons from Nature? Wikidata
Maximising information recovery from rank-order codes Wikidata
Microprocessors: the engines of the digital age. Wikidata
Modelling normal and impaired letter recognition: implications for understanding pure alexic reading. Wikidata
A Multicast Routing Scheme for a Universal Spiking Neural Network Architecture Wikidata
Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems Wikidata
n88018819 National Diet Library, Japan
Neural systems engineering Wikidata
Neuromodulated Synaptic Plasticity on the SpiNNaker Neuromorphic System. Wikidata
On-chip and inter-chip networks for modeling large-scale neural systems Wikidata
Power-efficient simulation of detailed cortical microcircuits on SpiNNaker. Wikidata
Principles of asynchronous circuit design : a systems perspective Library of Congress/NACO National Library of the Netherlands
Real-time million-synapse simulation of rat barrel cortex Wikidata
Robustness of spiking Deep Belief Networks to noise and reduced bit precision of neuro-inspired hardware platforms. Wikidata
"Serial" effects in parallel models of reading. Wikidata
Sparse distributed memory using rank-order neural codes. Wikidata
STDP pattern onset learning depends on background activity. Wikidata
Validating the AMULET Microprocessors Wikidata
VLSI RISC architecture and organization National Diet Library, Japan National Library of Israel xR Extended Relationships Library of Congress/NACO National Library of France
比較研究RISCアーキテクチャ : 基礎から学ぶプロセッサ設計とVLSIチップの実例 National Diet Library, Japan NII (Japan)

Open Section Close Section Selected Co-authors

Open Section Close Section Countries and Regions of Publication (5)

Open Section Close Section Publication Statistics

Open Section Close Section Selected Publishers (9)

Open Section Close Section History of VIAF ID:76899 (19)