Ayala, José L.
VIAF ID: 173464565 ( Personal )
Permalink: http://viaf.org/viaf/173464565
Preferred Forms
- 100 1 _ ‡a Ayala, Jose L.
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- 100 1 _ ‡a Ayala, Jose L.
- 100 1 _ ‡a Ayala, Jose L.
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- 100 1 _ ‡a Ayala, José L.
- 100 1 _ ‡a Ayala, José L
- 100 1 _ ‡a Ayala, José L.
4xx's: Alternate Name Forms (3)
Works
Title | Sources |
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Communication architectures for systems-on-chip | |
Embed. syst. (Boca Raton, Print) | |
Embedded systems. | |
Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation : 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011. Proceedings | |
VLSI-SoC: Forward-Looking Trends in IC and Systems Design : 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers |