Markov, Igor L.
Markov, Igor L. (Igor Leonidovich), 1973-
Markov, Igor L. 1973-
Markov, Igor Leonidovič (1973- ).
Igor L. Markov American computer scientist and engineer
VIAF ID: 9539296 ( Personal )
Permalink: http://viaf.org/viaf/9539296
Preferred Forms
- 100 0 _ ‡a Igor L. Markov ‡c American computer scientist and engineer
- 100 1 _ ‡a Markov, Igor L.
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- 100 1 _ ‡a Markov, Igor L.
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- 100 1 _ ‡a Markov, Igor L. ‡d 1973-
- 100 1 _ ‡a Markov, Igor L. ‡d 1973-
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- 100 1 _ ‡a Markov, Igor L. ‡q (Igor Leonidovich), ‡d 1973-
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4xx's: Alternate Name Forms (12)
5xx's: Related Names (4)
- 510 2 _ ‡a Facebook, Inc. ‡4 affi ‡4 https://d-nb.info/standards/elementset/gnd#affiliation ‡e Affiliation
- 510 2 _ ‡a Google LLC ‡4 affi ‡4 https://d-nb.info/standards/elementset/gnd#affiliation ‡e Affiliation
- 551 _ _ ‡a Kiew ‡4 ortg ‡4 https://d-nb.info/standards/elementset/gnd#placeOfBirth
- 510 2 _ ‡a University of Michigan ‡b Department of Electrical Engineering and Computer Science ‡4 affi ‡4 https://d-nb.info/standards/elementset/gnd#affiliation ‡e Affiliation
Works
Title | Sources |
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Design, analysis and test of logic circuits under uncertainty | |
EDA for IC implementation, circuit design, and process technology. | |
Electronic design, automation for IC system design, verification, and testing | |
Functional design errors in digital circuits : diagnosis, correction and repair | |
Multi-objective optimization in physical synthesis of integrated circuits | |
Optimal partitioners and end-case placers for standard-cell layout, 1999: | |
Quantum circuit simulation | |
Top-down timing-driven placement with direct minimization of maximal signal delay, 2001: | |
Very Large Scale Integration physical design | |
VLSI Physical Design: From Graph Partitioning to Timing Closure |