Rammig, Franz Josef, 1947-....
Rammig, F. J.
Rammig, Franz J.
Franz Josef Rammig informaticien allemand
Rammig, Franz Josef
VIAF ID: 74396802 ( Personal )
Permalink: http://viaf.org/viaf/74396802
Preferred Forms
- 100 0 _ ‡a Franz Josef Rammig ‡c informaticien allemand
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- 100 1 0 ‡a Rammig, F. J.
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- 100 1 _ ‡a Rammig, Franz Josef ‡d 1947-
- 100 1 _ ‡a Rammig, Franz Josef ‡d 1947-
- 100 1 _ ‡a Rammig, Franz Josef, ‡d 1947-....
4xx's: Alternate Name Forms (13)
5xx's: Related Names (8)
- 510 2 _ ‡a Heinz Nixdorf Institut
- 510 2 _ ‡a Heinz Nixdorf Institut ‡e Affiliation
- 510 2 _ ‡a IFIP TC10 Working Conference: International Embedded Systems Symposium, IESS (2005 : Manaus, Brazil)
- 510 2 _ ‡a IFIP WG 10.2 Workshop on Tool Integration and Design Environments (26/27-11-1987 : Paderborn, FRG)
- 510 2 _ ‡a International Federation for Information Processing. WG 10.3
- 510 2 _ ‡a International Federation for Information Processing. WG 10.5
- 510 2 _ ‡a International Workshop on Distributed and Parallel Embedded Systems (1998 : Schloß Eringerfeld)
- 551 _ _ ‡a Landsberg am Lech
Works
Title | Sources |
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alternative approach to self timed VLSI-systems | |
Architektur und Betrieb von Rechensystemen : 10. GI/ITG Fachtagung, Paderborn, 9.-11. März 1988 : proceedings | |
Biologically Inspired Cooperative Computing : IFIP 19th World Computer Congress, TC 10: 1st IFIP International Conference on Biologically Inspired Computing, August 21–24, 2006, Santiago, Chile. | |
CAP/SIL eine Systemimplementierungssprache für Multi-Mikroprozessor-Systeme aus der CAP Sprachfamilie | |
A concept for the editing of hardware resulting in an automatic hardware editor | |
concurrent programming language CAP and the -processor oriented CAP CAD-system | |
A cooperative and verifiable UAV behavior for 3D environments | |
Dependability of Self-Optimizing Mechatronic Systems | |
Design aids for highly distributed hardware | |
Design Methodology for Intelligent Technical Systems : Develop Intelligent Technical Systems of the Future | |
DIGITEST: a structural language based on algebraic models of the logic topology and the time behaviour of digital circuits | |
Distributed and parallel embedded systems : IFIP WG10.3/WG10.5 international workshop on distributed and parallel embedded systems (DIPES'98), October 5-6, 1998, Schloß Eringerfeld, Germany | |
Distributed, Parallel and Biologically Inspired Systems : 7th IFIP TC 10 Working Conference, DIPES 2010 and 3rd IFIP TC 10 International Conference, BICC 2010, Held as Part of WCC 2010, Brisbane, Australia, September 20-23, 2010. Proceedings | |
A dynamically reconfigurable hard-real-time communication protocol for embedded systems | |
Electronic design automation frameworks. proceedings ot the fourth international IFIP WG 10.5 working conference on electronic design automation frameworks | |
Embedded System Design: Topics, Techniques and Trends | |
Embedded Systems: Design, Analysis and Verification 4th IFIP TC 10 International Embedded Systems Symposium, IESS 2013, Paderborn, Germany, June 17-19, 2013. Proceedings | |
Entwurf, Beschreibung und Implementation von Systemen mit Hilfe der nebenläufigen Programmiersprache CAP | |
Five valued quasi Boolean functions | |
From specification to embedded systems application | |
Hierarchical modular description of VLSI systems | |
Immunorepairing of hardware systems | |
implementation of the computer hardware description language CAP and its applications | |
IT-Plattformen für die Smart Service Welt Verständnis und Handlungsfelder | |
Mehrebenensimulation | |
Mit VHDL ist ein wesentlicher Durchbruch gelungen | |
Mixed Reality in the Loop - an iterative prototype-based design method for the development of mixed reality applications | |
Mixed reality in the loop ein iteratives, prototypenbasiertes Entwurfsvorgehen für die Entwicklung von Mixed Reality Anwendungen | |
Modelle und Methoden für den integrierten Systementwurf | |
Modelling aspects of system level design | |
Multi-criteria cooperation in multiagent systems by local adaptation | |
A multilevel cybernetic model of the design process | |
Multilevel simulation techniques | |
Neuere Trends der Hardwareentwurfmethodik als Richtschnur für die Softwareentwicklung | |
Petri net based description, analysis and simulation of concurrent processes | |
Quasi reale Boolesche Funktionen ein Versuch, zeitliche Effekte physikalisch realisierter Bauteile zu algebraisieren | |
Self-Organizing Ad-hoc Mobile Robotic Networks | |
Self-timed design : 30.11.-04.12.92 (9249) | |
Simulation digitaler Systeme auf verschiedenen Abstraktionsebenen | |
Simulator digitaler Schaltwerke SIMAL | |
Software Technologies for Embedded and Ubiquitous Systems : 5th IFIP WG 10.2 International Workshop, SEUS 2007, Santorini Island, Greece, May 2007. Revised Papers. Roman Obermaisser, Yunmook Nah, Peter Puschner, Fra. | |
Structured parallel programming with a highly concurrent programming language | |
Synthesis related aspects of simulation | |
System level simulation concepts | |
Systematischer Entwurf digitaler Systeme von der System- bis zur Gatter-Ebene | |
Systematischer Entwurf eines 32-Bit Mikroprozessors als Ausbildungsaufgabe | |
Testable self-timed controllers | |
theoretisches Modell des Zeitverhaltens digitaler Schaltungen und seiner Anwendung in Simulationshard- und -software | |
Tool integration and design environments proceedings of the IFIP WG 10 2 Workshop on Tool Integration and Design Environments, Paderborn, FRG, 26 - 27 November, 1987 | |
Towards full virtualization of embedded real-time systems | |
Überlegungen zur Kontrollstruktur einer Computer-Hardware-Beschreibungs-Sprache | |
Übersetzer DIGITEST (Version 2.2) | |
Zur Vollvirtualisierung eingebetteter Echtzeitsysteme |