Rheinische Friedrich-Wilhelms-Universität (Bonn). Forschungsinstitut für diskrete Mathematik
Universität Bonn Forschungsinstitut für Diskrete Mathematik
Forschungsinstitut für Diskrete Mathematik
Forschungsinstitut für diskrete Mathematik Bonn
Forschungsinstitut für Diskrete Mathematik Institut der Universität Bonn zur Erforschung der Diskreten Mathematik
VIAF ID: 152296318 ( Corporate )
Permalink: http://viaf.org/viaf/152296318
Preferred Forms
- 110 2 _ ‡a Forschungsinstitut für Diskrete Mathematik
- 210 | | ‡a Forschungsinstitut für diskrete Mathematik ‡c Bonn
- 110 2 _ ‡a Forschungsinstitut für Diskrete Mathematik ‡c Institut der Universität Bonn zur Erforschung der Diskreten Mathematik
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- 110 2 0 ‡a Universität Bonn. ‡b Forschungsinstitut für Diskrete Mathematik
- 110 2 _ ‡a Universität Bonn ‡b Forschungsinstitut für Diskrete Mathematik
4xx's: Alternate Name Forms (22)
5xx's: Related Names (4)
- 551 _ _ ‡a Bonn
- 551 _ _ ‡a Nordrhein-Westfalen
- 510 2 _ ‡a Rheinische Friedrich-Wilhelms-Universität Bonn ‡e Ueberordnung
- 510 2 _ ‡a Universität Bonn
Works
Title | Sources |
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Approaching 3/2 for the s-t-path TSP | |
Approximating the discrete time-cost tradeoff problem with bounded depth | |
An approximation algorithm for threshold voltage optimization | |
Approximation maximum integral multiflows on bounded genus graphs | |
The approximation ratio of the k-Opt heuristic for the Euclidean Traveling Salesman Problem | |
The asymmetric traveling salesman path LP has constant integrality ratio | |
Beating the integrality ratio for s-t-tours in graphs | |
Better s-t tours by Gao trees | |
Binary adder circuits of asymptotically minimum depth, linear size, and fan-out two | |
BonnCell : automatic cell layout in the 7nm Era | |
Bonnplace : a self-stabilizing placement framework | |
Construction Depth-Optimum Circuits for Adders and And-OR Paths | |
Delay optimization of combinational logic by AND-OR path restructuring | |
Detailed routing algorithms for advanced technology nodes | |
An exact algorithm for wirelength optimal placements in VLSI design | |
Fast approximation algorithms for the generalized survivable network design problem | |
A Fast Optimal Double Row Legalization Algorithm | |
Faster adder circuits for inputs with prescribed arrival times | |
Faster goal-oriented shortest path search for bulk and incremental detailed routing | |
Faster primal-dual convergence for min-max rosource sharing and stronger bounds via local weak duality | |
Few sequence pairs suffice : representing all rectangle placements | |
Global interconnect optimization | |
Global routing with inherent static timing constraints | |
Improving on Best-of-Many-Christofides for T-tours | |
Improving the Approximation Ratio for Capacitated Vehicle Routing | |
Intersecting and dense restrictions of clutters in polynomial time | |
Largest empty square queries in rectilinear polygons | |
Layers and matroids for the traveling salesman's paths | |
The limits of local search for the maximum weight independent set problem in d-claw free graphs | |
Local search algorithms for timing-driven placement under arbitrary delay models | |
Local search with learned constraints for last mile routing | |
Mathematics, reality, and aesthetics | |
Mathematik, Realität und Ästhetik eine Bilderfolge zum VLSI chip Design | |
Mathematik und Technologie, 1988: | |
On the integrality gap of the prize-collecting Steiner forest LP | |
On the shadow simplex method for curved polyhedra | |
Provably fast and near-optimum gate sizing | |
RC-aware global routing | |
Reducing Moser's Square Packing Problem to a Bounded Number of Squares | |
Reducing path TSP to TSP | |
Self-aligned double patterning cut mask generation for transistor gates | |
Steiner trees with bounded RC-delay | |
Time-cost tradeoff and Steiner tree packing with multiplicative weights | |
Two-connected spanning subgraphs with at most 10/7 OPT edges | |
Two-dimensional arrangement in rectangles | |
Two-level rectilinear Steiner trees | |
Vehicle routing with subtours | |
y-soft packings of rectangles |